Apparatus for numerical signaling of positions, including digital-to-analog converter

ABSTRACT

APPARATUS FOR PRODUCING DIGITAL SIGNALS WHICH NUMERICALLY REPRESENT AT ALL TIMES THE POSITION OF A MOVABLE ELEMENT AS IT MOVES TO DIFFERENT POSITIONS ALONG ITS PATH OF TRAVEL. THE DIGITAL SIGNALS IN THR FORM OF BI-LEVEL VOLTAGES ARE PRODUCED IN A MULTIDECADE REVERSIBLE COUNTER TO REPRESENT THE POSITION NUMERICALLY IN BINARY CODED DECIMAL NOTATION. THESE SIGNALS ARE SUPPLIED TO A DIGITAL-TO-ANALOG CONVERTER WHOSE ANALOG OUTPUT, CORRESPONDING TO THE REPRESENTED POSITION, IS SUPPLIED TO A RESOLVER TYPER TRANSDUCER MECHANICALLY COUPLED TO THE ELEMENT. THE TRANSDUCER PRODUCES A DISCREPANCY SIGNAL REPRESENTING THE SENSE AND EXTENT OF ANY DIFFERENCE BETWEEN THE NUMERICALLY REPRESENTED POSITION AND THE ACTUAL POSITION OF THE ELEMENT. SO LONG AS THE DISCREPANCY SIGNAL EXISTS, PULSE PRODUCING MEANS ARE ENABLED TO SUPPLY PULSES TO THE COUNTER SO AS TO CORRECTIVELY CHANGE THE NUMBER SIGNALED BY THE COUNTER UNTIL THE DIFFERENCE AND THE DISCREPANCY SIGNAL ARE REDUCED SUBSTANTIALLY TO ZERO. THE CLOSED LOOP CORRECTION IS VERY RAPID, SO FOR PRACTICAL PURPOSES THE NUMBER DIGITALLY SIGNALED BY THE COUNTER ALWAYS REPRESENTS THE ACTUAL POSITION OF THE MOVABLE ELEMENT.   THE DIGITAL-TO-ANALOG CONVERTER HERE SIDCLOSED IS THE TYPE WHICH PRODUCES SINE AND COSINE FUNCTIUON SIGNALS FOR EXCITATION OF A RESOLVER TYPE TRANSDUCER. THIS CONVERTER IS CHARACTERIZED BY CROSS-COUPLING OF THE OUTPUTS AND INPUTS OF TWO ALGEBRAIC COMBINING DEVICES SUCH AS OPERATIONAL AMPLIFIERS, BY STATIC SWITCHING MEANS RESPONSIVE TO INPUT SIGNALS DIGITALLY REPRESENTING A CHANGEABLE NUMBER, AND BY SIMPLE RESISTORS SELECTIVELY RENDERED EFFECTIVE TO PRODUCE A.C. SIGNALS PROPORTIONAL TO SINE AND COSINE FUNCTIONS OF THE SUMS OF ANGLES CORRESPONDING TO HIGHER AND LOWER ORDER PORTIONS OF THE CHANGEABLE NUMBER.

Jan. 5, 1971 T B BULLQCK 3,553,647 I APPARATUS FOR NUMERICAL SIGNALING OF POSITIONS, INCLUDING DIGITALTO-ANALOG CONVERTER Filed April 2l, 1967 13 Sheets-Sheet 1 I..,I...I...II/.I..II...I...I...II..I...I...Iig' j| lll/lll' /M/fA/fae. ryan/4.x' azzaacf,

3,553,647 INCLUDING Jan. 5, 1971 APPARATUS FOR N 13 Sheets-Sheet 2 Filed April 21, 1967 Jan. 5, 1971 3,553,647 INCLUDING T. B. BULLOCK APPARATUS FOR vIUMERICAL SIGNALING OF POSITIONS DIGITAL-TO-ANALOG CONVERTER 13 Sheets-Sheet I5 Filed April 2l, 1967 Jan. 5, 1971 T, Q BULLOCK 3,553,647

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Jan. 5, 1971 APPARATUS FOR N Filed April 21, 1967 T. B. BULLOCK UMERICAL SIGNALING OF POSITIONS,

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APPARATUS FOR NUMERICAL SIGNALING OF POSITIONS INCLUDING DIGITAL-TOANALOG CONVERTER Filed April 2l, 1967 l5 Sheets-Sheet 6 Huff' /A/mwme. r//aM/.r gaaanz,

ZZ/ aff/5% IMM/211 3,553,647 INCLUDING Jan. 5, i971 T. a. BULLOCK APPARATUS FOR NUMERICAL bIGNALING OF POSITIONS DIGITAL-TO-ANALOG CONVERTER 13 Sheets-Sheet 7 Filed April 2l, 1967 Qu NN N k Nmn Jan. 5, 1971 T B BULLOCK 3,553,647

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APPARATUS FOR NUMERICAL SIGNALING OF POSITIONS, INCLUDING DIGITAL-TO*ANALOG CONVERTER Filed April 2l, 1967 l5 Sheets-Sheet l) Jan. 5, lgl Tl B, BULLOCK 3,553,647

APPARATUS FOR VNUMERICAL .SIGNALING OF POSITIONS, INCLUDING DIGITAL-TO-ANALOG CONVERTER Jan. 5, 1971 T. APPARATUS FOR NUMERICAL Filed April 2l, 1967 B. BuLLocK 3,553,647

SIGNALING OF POSITIONS INCLUDING DIGITAL-TO-ANALOG CONVERTER l5 Sheets-Sheet 11 jan. 5, 197 T, B BULLOCK 3,553,647

APPARATUS FOR NUMERICAL SIGNALING OF POSITIONS, INCLUDING DIGITAL-TO-ANALOG CONVERTER ffm/m45 504406K,

Jan; 5, 1971 3,553,647 INCLUDING T. B. BULLOCK DIGI-TAL-TO-ANALOG CONVERTER l5 Sheets-Sheet 13 Filed April 2l, 1967 1| j A i f u z 17% i, l y W, d a i w United States Patent O U.S. 'CL 340--147 24 Claims ABSTRACT OF THE DISCLOSURE Apparatus for producing digital signals which numerically represent at all times the position of a movable element as it moves to different positions along its path of travel. The digital signals in the form of bi-level voltages are produced in a multidecade reversible counter to represent the position numerically in binary coded decimal notation. These signals are supplied to a digital-to-analog converter whose analog output, corresponding to the represented position, is supplied to a resolver type transducer mechanically coupled to the element. The transducer produces a discrepancy signal representing the sense and eX- tent of any difference between the numerically represented position and the actual position of the element. So long as the discrepancy signal exists, pulse producing means are enabled to supply pulses to the counter so as to correctively change the number signaled by the counter until the difference and the discrepancy signal are reduced substantially to zero. The closed loop correction is very rapid, so for practical purposes the number digitally signaled by the counter always represents the actual position of the movable element.

The digital-to-analog converter here disclosed is the type which produces sine and cosine function signals for excitation of a resolver type transducer. This converter is characterized by cross-coupling of the outputs and inputs of two algebraic combining devices such as operational ampliiiers, by static switching means responsive to input signals digitally representing a changeable number, and by simple resistors selectively rendered eifective to produce AC signals proportional to sine and cosine functions of the sums of angles corresponding to higher and lower order portions of the changeable number.

TABLE OF CONTENTS TIElNUIl/IAEIRICAL POSITION SIGNALIN G SYSTEM, IN

AN EllXAEIII/LPLARY EMBODIMENT OF THE SYSTEM, IN

DETAILS OF THE AMPLITUDE AND PHASE POLARI- TY DISCRIMINATOR DETAILS OF THE SIGN CONTROL DETAILS OF THE COUNT DIRECTION CONTRO PRISIEITING TO SELECT THE ZERO REFERENCE THE DIGITAL-TO-ANALOG CONVERTER (A) Review of the Relationships Between Numbers and Signals for Exciting Resolver Type Devices (B) General Organization for Producing Sine and Cosine Functions of Sums of Two Angles (C) An Operational Amplifier Viewed as an Algebr Combining Device (D) The Digital-to-Analog Decoder in General For-mm.

(E) A Preferred Version of FIG. l

(F) Changing the Resistance Values (G) A Detai ed Embodiment of the Present Decoder and Converter (I) Control o effe quadrants (2) Changes in effective signal polarities depending upon sign of counter number N RESUME OF SYSTEM OPERATION A PREFERRED PULSE PRODUCER CONTROLLED IN FREQUENCY A SIMPLIFIED AND PREFERRED EMBODIMENT OF THE DIGITAL-TO-ANALOG CONVERTER AN EMBODIMENT 0F THE DIGITAL-TO-ANALOG CONVERTER FOR COMBINING MORE THAN TWO CHANGEABLE ANGLES signal polarities according to ice The present invention relates in general to apparatus for numerically signaling the position of a movable element as the latter resides in or moves to diierent positions along its path of travel. In another aspect, the invention relates to digital-to-analog converters of the type which produce signals proportional to sine and cosine functions of a numerically signaled, changeable plural digit number, such signals being usable to excite a resolver type transducer. The uses for the invention are many and varied, but it will iind especially advantageous application in the control of the movable elements of machine tools, and in providing a visual display of numbers representing the positions of such machine tool elements.

It is the general aim of the invention to produce digital signals numerically representing the position of a movable element with a high degree of precision and very little dynamic error, and yet to accomplish this with relatively simple, reliable apparatus. This is accomplished by continuously determining any error or discrepancy between the signaled position and the actual position of the movable element, and correcting the signaled position rapidly, even as the element is moving, in a manner which does not require a pulse generator mechanically driven from the movable element and which avoids errors due to loss or spurious insertion of pulses from such a generator.

More particularly, an important object of the invention is to provide a digital position-signaling system wherein only one reversible, multistage counter is required to signal the digit values of a multiorder position representing number, and only the signals from lower order stages of that same counter are employed to elect automatic corrections in the signaled number so as to make the latter represent the actual position of a movable element. The single counter in this fashion serves two important functions, i.e., it numerically signals the complete positionrepresenting number and it provides the input signals to automatically correct that number.

Another object of the invention is to provide a digital position-signaling system in which the zero reference point, from which element positions are measured and numerically signaled, may be quickly and precisely set to any desired location along the elements path of travel, and in a fashion which does not require that the element be moved physically to the desired zero reference point.

It is still another object to provide such a system wherein the position of the movable element is signaled by a signed number, i.e., as positive or negative displacement from a reference position, this being accomplished by employing a single counter and automatically signaling the sign of the number held therein as the element resides in positive or negative displacement regions on opposite sides of a zero reference point.

A related object of the invention is to provide such a digital position-signaling system in which the signaled position is always kept in agreement with the elements actual position by correcting the former until a resolver type transducer, e.g., a rotational resolver or a linear Inductosyn device, is conditioned to produce a null response.

It is a further object of the invention to provide such a system in which the signaled position-representing number is correctively increased or decreased as the displacement of an element from the zero reference point is increased or decreased--in either positive or negative regions--by controlling the sense of counting (upward or downward) in a counter in response to pulses admitted to the counter.

It is also an object to make the rate at which the signaled position-representing number changes generally proportional to the discrepancy between that number and the actual position of the movable element, so that fast correction is obtained when the discrepancy is large but overcorr'e'ction and hunting are avoided and dynamic lags kept small.

In another aspect, it is an important object of the inve'ntion to provide a digital-to-analog converter for changing a `signaled multiorder number into sine and cosine function analog signals, such converter being characterized in its ability to respond very quickly to changes in the signaled number and in its relatively simple structural organization.

vAn especially important feature of such converter is its ability to produce sine and cosine function signals basedupon the sum of variable larger and smaller angles which correspond to higher and lower order portions of a composite number, by virtue of a single structural organization which includes cross-coupling of algebraic combining devices.

Another object of the linvention is to provide a converter which maybe constructed without moving parts, physical switch contacts or inductive components, thereby to achieve rapid` and precise operation as the numberrepresenting input signals change at a high rate.

In this connection, it is an object to provide such a converter in which the number of resistors or related elements is kept small by providing those necessary to produce sine and cosine function signals over one quadrant of possible angles corresponding to one quarter of the range of signaled input numbers, and utilizing the same resistors with proper changes in effective signal polarities as a signaled input number takes on values corresponding to angles in the other three quadrants.

Still another object is to provide such a digital-toanalog converter Iwhich is responsive to the sign of the signaled input number, so that the sine and cosine function signals may properly excite a transducer to locate null positions in the pos-itive or negative regions on opposite sides of a zero reference point.

These and other objects and advantages will become apparent as the following description proceeds with reference to the accompanying drawings, wherein:

FIG. 1 is a generalized block diagram of a digital position-signaling system embodying the present invention;

lFIG. 2 is a diagrammatic illustration in block-and-line form showing the system of FIG. l in more complete detail;

FIG. 3 is a block diagram drawn with conventional logic circuit symbols to show the detailed organization of certain components which appear in FIG. 2 only as simple blocks;

' FIG. 4 is a series of wave forms which depict the relationships of certain signals in the operation of the amplitude and polarity discriminator shown in FIG. 3;

FIG. 5 is a graphical representation of the relationships between the signaled number, null location, and actual positions under different circumstances, and depicts the operation of the system in controlling the direction in which a counter counts;

FIG. 6 is a chart which illustrates the relationships between the signaled input number, the corresponding angle, and the magnitude and polarities of sine and cosine functions of the angle;

FIG. 7 is a diagram showing a portion of the diagram of FIG. 6 drawn to an enlarged but purposely distorted scale to illustrate how any angle 0 is constituted by the sum of two angles 01 and 02 which are respectively equal to ma and n as m and n have different values;

FIG. 8 is a block diagram showing cross-coupled algebraic combining devices as employed in the digital-toanalogconverter;

' FIG. `9 shows a typical algebraic combining device in FIG. 1.1 is similar to FIG. 10 but shows in generalized converter;

FIG. l2 is a schematic diagram illustrating the general organization which is employed for switching in differently valued resistors and controlling effective signal polarities according to the quadrant of the numerically signaled angle;

FIGS. 13A and 13B when joined together form a schematic diagram of the complete decoder and digitalto-analog con-verterfwhich appears generally in FIG. 2;

FIG. 14 shows typical portions of the logicl gating for,

FIG. 13A;

FIG. 15 is a detailed illustration of a variable frequency pulse producerfwhich is preferably employed in lieu of the pulse producer shown in FIG. 2; Y l

FIG. 16 is a schematic diagram of an alternative and preferred embod-iment of the digital-to-analog converter; FIG. 17 is a chart similar to that of FIG. 6 but show-l ing the relation of numbers and angles for the apparatus of FIG; 16; and

FIG. 18 is a generalized schematic diagram for stillV THE NUMERICAL POSITION-SIGNALING SYSTEM, IN GENERAL The general organization and operation of the nu merical position-signaling system may be understood by brief reference to FIG. 1 wherein an element 15 (for example, the work table of a machine tool) is movable horizontally to the left or to the right along a supporting bed 16 so that it may res-ide in different selected positions. The automatically or manually operated means for translating the element from one position to another are not shown. Merely as an illustration that the elements position may be designated in numerical terms, a calibrated scale 18 similar to, 'but more precise than, a yardstick isv shown fixed to or scribed on the stationary bed, and the location of an index mark 19 carried by the element 15 with reference to the scale may be read visually in order to determine the numerical value of the elements position with respect to the zero point of the scale. Of course, where the range of travel of the element is on the order of 200, and the position of the element is to be determined with an accuracy to the nearest .0001, the provision of such a finely calibrated scale and the visual reading of it are impractical. Y

Yet, in the` operation of machine tools, for example, there are many instances when' it is desirable to determine and signal the position of a movable element with a high degree of accuracy. The numerical signaling of the position may be employed for the purpose of making that position conform to a commanded and numerically signaled position, as disclosed for example in the copending application of Jack A. Wohlfeil, Ser. No. 447,291 iiled Apr. 12, 1965, and assigned to the assignee of the present application. Moreover, it is in many cases desirable to keep the machine tool operator informed of the position of a movable machine tool element so that he can bring it precisely to a desired location or so that he can check the operation of an automatic positioning control system. In these cases, the numerical signaling of the elements position may be caused to energize nu merical visual ldisplay devices.

In many prior systems, the position of a movable element has been electrically signaled in binary or binary coded decimal notation by mechanically coupling a pulse generator to the element or to a lead screw which is rotated in order to move the element. One pulse for each incremental movement (e.g., .001) is fed from the generator to a counter so that the number held in and sig- The system shown generally in FIG. 1 overcomes these diculties and does away with the need for a feedback pulse generator driven in timed relationship to the movement of the element. It includes a first means for signaling a represented position in numerical terms, by bi-level electrical signals representing the number in binary coded decimal notation. Such means are here shown as a reversible counter 20 having a plurality of decade counting stages a, b; c, d, e, f connected in tandem, and with the lower order stage f adapted to receive input pulses supplied to a pulse input terminal PI. As is well known in the counter art, each decade stage may include four bistate devices such as flip-flop circuits (not shown) interconnected by gates so that the bi-level signals on their output lines collectively represent any decimal value from to 9 as ten successive input pulses are received by that stage. Thus, as shown in FIG. 1, the output lines from the successively lower order stages in the counter will carry binary signals which represent any number ab. cdef held in the counter, where each of the letters in the foregoing expression can have any decimal digit value from 0 to 9. The number held in and signaled by the counter may be increased or decreased by supplying pulses to the pulse input terminal PI while simultaneously applying an enabling signal to counter control terminals CU or CD, respectively, thereby causing the counter to count upwardly or downwardly. A counter of this general type is disclosed in detail in the above-identified Wohlfeil application.

In the practice of the present invention, the signaled position, i.e., the number signaled by the counter 20, is continuously compared with the actual position of the element 15, and a discrepancy signal indicative of the sense and extent of any difference between the signaled and actual positions is produced. So long as the discrepancy signal exists, indicating that the represented and actual positions do not agree, that signal activates a means for correctively changing the signaled position, e.g., means for supplying pulses to the counter 20 so as to change the number signaled thereby until the discrepancy is reduced substantially to zero. As generally illustrated in FIG. l, the output signals from the lower order stages d, e, f of the counter 20 are supplied to a digital-to-analog converter 21 which produces variable magnitude output signals ES and Ec representing in analog form the numerically signaled position. More particularly, the analog output from the converter 21 represents the numerically signaled position to the nearest .0001 within a span of 0.1000, since the input number def supplied to the converter may represent any distance from xx.x000" to xx.x999. The output signals Es and Ec are in this instance sinusoidal alternating voltages which vary in amplitude and phase polarity according to sine and cosine functions of an angle 0 which is the product of the signaled number de)c and a predetermined increment angle The converter 21 receives as its input signal a sinusoidal reference voltage Er, and the two output signals vary in amplitude relative to` the amplitude and phase of the reference signal Er as sine and cosine functions of the angle 6. That is,Es=Ersin 0=Er sin defand Ec=l5`r cos 0=Er cos def-. Merely by way of example, the number def represented by input signals to the converter 21 can take on any value between 000 and 999; and if the predetermined increment angle is 0.36", then the angle 6 can have any value from 0 to 359.64 in steps of 036 as the number def changes from 000 to 999.

These sine and cosine function signals Es and Ec are suitable for excitation of a transducer which is responsive to the elements position to produce a discrepancy signal. More particularly, the transducer employed is of the resolver type which is mechanically coupled to the movable element and thus is responsive to its actual position. The term resolver type device is used here as a generic designation for that class of well known devices exemplied by (a) a standard wound-rotor and wound-stator rotary induction resolver, (b) a rotary Inductosyn unit, or (c) a linear Inductosyn unit. If the movable element 15 is one which travels in a circular path instead of the linear path here shown, then the rotor of a conventional resolver or a rotational Inductosyn unit would be mechanically coupled to the element either directly or through precision gearing. Also, in the case where the element 15 is translatable along a linear path by a precision lead screw, a conventional rotary resolver or a rotational Inductosyn unit might be connected directly or through precision gearing to the lead screw so as to be responsive to the actual position of the element. As here shown in FIG. l, however, a linear Inductosyn unit is employed, comprising a slider 22 rigidly fixed to and movable with the element 15 along a path closely adjacent to a stationary scale 24.

Linear Inductosyn devices have been described in numerous publications (e.g., Journal of British I.R.E., vol. 17, No. 7, pp. 369-383, July 1957) and are well known to those skilled in the art. It will suffice, therefore, to observe briey that the sine and cosine signals from the converter 21 are connected respectively to excite two physically displaced and interlaced ribbon-like conductors or windings on the slider 22, and the resulting electromagnetic field induces an output signal in a ribbonlike conductor or winding which extends the length of the scale 24. In summary terms, sinusoidal alternating voltage induced in the scale 24 varies in amplitude and phase polarity (relative to the reference voltage Er) according to the sense and extent of the difference between the signaled position represented by the excitation signals Es and Ec supplied to the slider and the actual position of the slider relative to the scale (over a predetermined iine span, for example, 0.1000). That is, the excitation signals Es and Ec represent an analog of the signaled position of the element corresponding to the number def; the position of the slider 22 is a true analog of the actual position of the element 15; and the output signal from the scale 24 by its amplitude and phase p0- larity is an analog of the discrepancy between the signaled and actual positions. When the discrepancy is reduced to zero, the output signal from the scale (here called the discrepancy signal DS) is reduced substantially to a zero amplitude. More particularly, since it is assumed that the Inductosyn device 22, 24 has a repeating fine span of 0.1000", any given value of the number def and the corresponding combination of the signals Es and Ec will represent a plurality of signaled positions or null l0ca.

tions uniformly spaced apart by 0.10 along the path. The discrepancy signal DS is proportional in amplitude, and agreeable in polarity with, a sine function of the extent and sense of the difference between the actual position of the element 15 and the nearest one of the null positions represented by the number def, but in the region of any null it may be assumed that the discrepancy signal DS is generally proportional to the extent of the said difference.

The discrepancy signal DS is received by a discriminator 26 which serves two functions. First, if the signal position is numerically less than or greater than the actual position of the element 15, the discrirninator 26 in comparing the phase relationship of the reference signal ET and the discrepancy signal DS supplies an enabling potential to the counter control terminals CU or CD, respectively, so that the counter will count in an up or down sense in response to any pulses received on its input terminal PI. Secondly, so long as the discrepancy signal is in amplitude appreciably greater than zero, the discriminator 26 produces a count signal C'I' which opens a normally closed gate 28, permitting the latter to transfer pulses from a recurring pulse source 30 to the counter input terminal PI. The gate 28 and the pulse source 30 collectively constitute a pulse producer 32 controlled by the discriminator so as to admit pulses to the counter 20 whenever the number signaled by the latter does not precisely represent the true position of the element as sensed by the Inductosyn unit 22, 24.

To summarize the operation briefly, it may be assumed that the counter originally holds and signals on its output lines a number 21.5243; and that the element 15 resides precisely at a position of 21.5243" from the reference point of measurement. The number def signaled on the counter output terminals and supplied to the converter 21 will Ibe 243, and assuming that the increment angle is 0.36", the sine and cosine signals Iwill in amplitude be proportional to sin 87.48 and cos 87.48 times the amplitude of the reference signal Er. This combination of excitation signals applied to the two conductors in the slider 22 establishes an electromagnetic iield which induces no discrepancy signal in the scale 24 -when the slider is at any physical position designatable xx.x243" (the small xs in a numerical expression indicate that the corresponding digits may have any value) Thus, under the assumed conditions, the discrepancy signal has zero volts amplitude, the discriminator 26 produces no count signal CT, the gate 28 is closed, and no pulses are supplied to the counter 20. Because the signaled position agrees precisely with the actual position of the element 1-5, the number signaled by the counter remains constant.

If now the element 15 is moved to the right, so that its actual position becomes greater than 21.5243", then the discrepancy signal DS will increase in amplitude with a positive phase polarity (i.e., it will be in phase with the reference signal Er), so that discriminator 26 will supply an enabling potential to the control terminal CU, and will create a count signal CT to open the gate 28. Accordingly, as the element 15 moves to the right, pulses Will be admitted to the counter 20 and counted in an upward sense, so that the signaled position will increase. By the time that the element moves to and stops in a position of 22.8130, the counter will almost simultaneously arrive at a higher count state in which the numerically signaled position is 22.8130, and the discrepancy signal DS will return to zero, and the gate 28 will close to leave the counter in a state precisely representing the new actual position of the element. The same sort of operation will occur when the element 15 is moved from a first position toward the left to a second position, although in this instance the counter will count downwardly in response to input pulses received thereby until the signaled position agrees precisely with the new, numerically smaller actual position.

AN EXEMPLARY EMBODIMENT OF THE SYSTEM 1N DETAIL Referring now to FIG. 2, the counter 20 is there shown in more detail as comprising six decade stages corresponding to the digit orders 101, 100, 10-1, 10*2, 10-3, and 101*4 with each stage having four output lines on which appear bi-valued voltages (for example, 0 volts or +12 volts representing the binary levels 0 or l) which represent any decimal value from 0 to 9 in the familiar 1-2-4-8 decimal code. For ready understanding of the operation of each counter stage in the count up mode, this :1248 code notation is set forth below:

Of course, when the counter is operating in the count down mode, each pulse received lby a stage causes the latter to revert to its next lower decimal state, and when the stage switches from the decimal 0 to the decimal 9 state, a borrow pulse is transmitted to the next higher order stage in the tandem array. The counter counts up or down in response to pulses received on its terminal P1 while an enabling or binary l level signal is applied to its control terminal CU or CD from a count direction control 35 to be described more fully below.

Other types of multiplace reversible counters may be employed, for example, those formed by ten-cathode counter tubes; and other signal notations (e.g., binary, straight decimal or different binary decimal codes) may be employed as a matter of choice. In the exemplary arrangement of FIG. 2, the position-representing number abdef which can have any value between 00.0000 and 99.9999 may be signaled by the bi-level voltages which appear in different patterns on the six groups of four output lines of the counter. Of course, a greater or lesser number of digit places may be used. For convenience in the following description, the changeable six-place number signaled by the counter 20 will be referred to as number It is contemplated that the reference point from which the position of the element 15 is measured and numerically signaled may be located anywhere along the path which the element 15 travels, and that the element may move to either positive or negative regions on opposite sides of the reference point. For example, if the reference point is at the middle of a travel path which is long, then when the element is located 25", 50" or 75" from the left extremity of the path, its position will 'be numerically designated as -25.0, 0.0, or +250". In order to signal the sign of the number N established in the counter 20, a bistate sign flip-flop 36 is associated with the counter. When this ip-op is in its set or reset states, the signals N-land N- appearing at its two output terminals will respectively' reside at binary l levels, indicating that the sign of the counter number N is positive or negative, respectively. The manner in which the state of the sign flip-flop is switched by a sign control 38 'will be treated hereinafter.

To display in visual form the numerically signaled position, the output lines of the counter 20 are connected to actuate a multidigit lighted numerical display system. For example, the decade stage c of the counter 20 has its four output lines connected as inputs to a BCD-todecimal decoder 39 so that as the c digit of the signaled number has any value 0 through 9, a corresponding one of the ten output lines 0 through 9 of the decoder 39 receives an energizing voltage which is applied as a controlling input to a c digit display unit 40, thereby causing the corresponding decimal numeral 0 through 9 to appear p visually illuminated on the face of that unit. The display unit 40 may be, for example, one of the Well-known Nixie tubes or any of the several projection type numerical display devices which are presently available on the commercial market. The other five digit places for the counter 20 are associated with decoders and display units in precisely the same fashion so that the entire positionrepresenting number N may be easily read by an operator.

For displaying the sign of the counter number N, the N+ and N signals are supplied to a sign display unit 41 which shows an illuminated or symbol Whenever the sign flip-flop 36 is respectively in its set or reset states, and the N+ or N- signal resides at a binary l level.

The number N signaled in 1-2-4-8 binary coded decimal notation by the potential levels on the twenty-four counter output lines may be utilized for computation land control purposes, as well as for actuating the visual display units. Merely to illustrate this fact, the twenty-four output lines of the counter Z are shown in FIG. 2 as leading through a multiconductor cable 42 to other utilization devices which are not specifically illustrated. Moreover, it is desirable in the control of the present numerical display system to produce a signal when the number contained in the counter is zero, i.e., when N=00.0000. In FIG. 2, the twenty-four output lines from the counter 20 are shown as leading to zero a detector 44 which produces an output signal Z at a binary l level only when the complete counter number N is zero. The manner in which the signal Z is utilized will become clear from subsequent portions of the present disclosure.

The twelve output lines of the three lowest order counter stages d, e, f are also coupled to the input of a decoder 21a which forms a part of the digital-to-analog converter 2l. These three groups of four output lines are here conveniently designated d8, d4, d2, d1; e8, e4, e2, e1; and f8, f4, f2, f1. Merely to give an example, if the number def (formed by the three lowest order digits of the number N) signaled on these twelve counter output lines is 764, then they will reside at the following binary levels, reading from left to right: Olll 0110 0100. Any number def between 000 and 999 may thus be signaled by the three lowest order stages of the counter and supplied as the input to the decoder 21a.

The output conductors from the decoders 21a supply signals in a different form to the input of the converter 21, as will be fully explained below. For the present, it may be assumed that the converter 21 receives an exciting reference voltage Er from a sinusoidal reference wave generator 46 which may be a continuously running oscillator operating at a frequency of 1000 hertz. In response to the number-representing signals received from the decoder 21a, the converter 21 produces two sinusoidal voltages Es and Ec which vary in amplitude and phase polarity (relative to the reference voltage Er) as sine and cosine functions of an angle 0 which is proportional to the value of the signaled number def. This will be explained more fully as the details of the converter 21 are described hereinafter.

The sine and cosine 'signals Es and Ec are transferred through a manually adjustable differential resolver 48, whose purpose will become apparent later (and through appropriate impedance matchers or amplifiers, not shown), to the sine winding 22a and the cosine winding 22b of the Inductosyn slider 22. Assuming for the moment that the stator and rotor windings of the differential resolver 48 are alined, the voltages Es and Er, will be transferred through the resolver to the slider 22 without substantial change.

As noted previously, the slider 22 is rigidly fixed to or carried by the movable element 15, and the latter is illustrated in FIG. 2 as rigidly connected to a nut 49 engaged with a lead screw 50 rotationally and selectively drivable in opposite directions by a motor 51 controlled by any suitable manual or automatic positioning control system 52.

When the signaled position and the actual position of the element 15 disagree, then the sine and cosine excitation signals applied to the slider 22 will cause an alternating discrepancy signal or voltage to be induced in the winding 24a of the scale 24. This signal is passed through an amplifier 54 and appears as the sinusoidal discrepancy signal DS which is routed to one input of an amplitude and phase polarity discriminator 55. This discriminator also receives as a second input a recurring square wave signal REF matched precisely in frequency and phase to the reference signal Er, and derived from the latter by a squaring circuit 56. As hereinafter made clear, if the signaled number is less than or greater than the actual position of the element 15, then the discriminator 55 produces a SIG-{ or a SIG signal, respectively, and the latter are utilized in determining the direction of corrective counting by the counter 20 and in determining the correct sign for the counter number. Moreover, when the discrepancy signal has an amplitude greater than zero 0r a predetermined small null value, the discriminator 55 produces a count signal CT which opens the gate 28 in the pulse producer 32 to admit pulses from the source 30 to the counter 20.

DETAILS OF THE AMPLITUDE AND PHASE POLARITY DISCRIMINATOR Although other suitable discriminators will suggest themselves to those skilled in the art, one preferred form as shown in FIG. 3 includes a field effect transistor 60 having its gate terminal G connected to receive the square Wave reference voltage REF, its source terminal S connected to receive the sinusoidal discrepency voltage DS, and its drain terminal D connected through a capacitor 61, paralleled by a bleeder resistor 62, to a point of common reference potential here shown as ground.

As is well known, a field effect transistor (hereinafter called an FET) presents an extremely high resistance (which may be viewed as an opened circuit, for purposes of discussion) between its source and drain terminals S, D so long as the gate G is held at a potential substantially negative with respect to the drain D and the source S. This negative turn-off potential will here be considered as a binary 0 level. Conversely, when the gate G is raised to a potential at or slightly positive (here termed a binary 1 level) with respect to the potential of the drain D, then a very low resistance (which may be viewed as a short circuit for purposes of discussion) exists between the source and drain terminals, so that current may fiow readily between the source and the drain-and in either direction.

With this in mind, it will be seen that when the discrepancy signal DS is in phase with the reference signal REF (compare the wave forms 64 and 65 in FIG. 4), then during the positive half cycles of the reference wave, the source-drain path of the FET will be conductive, and the signal DS will make the source positive with respect to ground. Accordingly, current will ow from the source to the drain (during positive half cycles of the signal DS, shown shaded on the wave form in FIG. 4), charging the capacitor 61 positively (uncircled polarity signs)-and to a voltage level which is proportional to the peak amplitude of the discrepancy signal DS. Under these conditions, the source-drain path of the FET 60 will be nonconductive during the negative half cycles of the reference voltage REF, so that during the negative half cycles of the discrepancy signal DS the capacitor is not discharged, except to a very slight degree by current passing through the resistor 62. Since the capacitor can discharge only slowly through the resistor 62, and the positive half cycles of the signals DS recur frequently to recharge the capacitor, the voltage V1 which appears across the capacitor is held substantially constant at a magnitude which is proportional to the peak amplitude of the discrepancy signal.

On the other hand, when the discrepancy signal is 180 out of phase (here called a negative phase polarity) with the reference wave REF, the FET 60 will conduct current from the drain D to the source S as a result of the negative half cycles of the discrepancy signal which coincide with the positive half cycles of the reference signal. Compare the curves 64 and 66 which are shown in FIG. 4, and observe that the source-drain path of the FET 60 will conduct current during the shaded negative half cycles shown in association with the curve 66. In this case, the capacitor 61 will be charged negatively (circled polarity signs) and to a voltage magnitude which is proportional to the peak amplitude of the discrepancy signal.

Under normal circumstances the discrepancy signal DS will be substantially zero in amplitude, and the voltage V1 appearing across the capacitor 61 will normally be zero. However, when the discrepancy signal exists with a positive or negative phase polarity, then the D.C. voltage V1 will appear across the capacitor, corresponding in polarity and magnitude to the phase polarity and amplitude of the discrepancy signal.

As a way of representing the phase polarity of the discrepancy signal by binary logic signals, the voltage V1 is supplied as the input to two trigger circuits 68 and 69 which may be similar or equivalent to the well known Schmitt triggers. The rst trigger circuit responds only when the voltage V1 is positive in polarity and greater than a predetermined, small magnitude. Under these conditions, the trigger circuit 68 is set and it produces an output signal SIG+ at a binary 1 level. By contrast, the second trigger circuit is arranged to respond only when the voltage V1 is negative in polarity and greater than a predetermined, small magnitude. When triggered under these circumstances, the circuit 69 produces an output signal SIG- at a binary 1" level. The SIG+ and SIG- signals are connected as inputs to the sign control 38 and the count direction control 35 as shown in FIGS. 2 and 3.

The triggering levels of the circuits 68 and 69 may be adjusted by setting control rheostats 68a and 69a associated therewith, such adjustments being made in order to preclude triggering in response to minute noise signals which might appear at their inputs. Moreover, the triggering levels of the circuits 68 and 69 may be adjusted so that neither circuit triggers when the voltage V1 is reduced to a very low level corresponding to a null response in the scale 24 in those cases where a null is not indicated by the discrepancy signal falling completely to zero volts amplitude.

As shown in FIG. 3, the SIG+ and SlG- signals are supplied as inputs to an OR circuit 70, the output of the latter creating the count signal CT at a binary l level when either the SIG+ and SIG- signal is a binary 1. The appearance of the count signal CT opens the gate 28 (FIG. 2) as previously explained. In summary, it will now be understood that the amplitude and phase polarity discriminator 55 serves as a means for producing a rst control signal CT so long as the discrepancy signal has greater than a predetermined, small amplitude (preferably zero); and it also constitutes a means for producing second and third control signals SIG+ and SIG- when the phase polarity of the existing discrepancy signal is positive or negative relative to the reference voltages REF and Er. Conversely, when the discrepancy signal is reduced substantially to zero, the CT, SIG+ and SIG- signals all revert to a binary G level.

DETAILS OF THE SIGN CONTROL As mentioned previously, the changeable number N=ab.cdef signaled by the counter 20 may represent the position of the element in terms of its displacement in a positive or negative direction from a zero reference point located on the path of travel. Thus, the signaled number N must also have a signaled sign to be complete,

12` and the bistate dip-flop 36 when in its rst or second (set or reset) states makes the signals N+ or N- respectively have a binary l level to represent the number sign as positive or negative.

To make certain that the bistate flip-flop 36 is always correctly set or reset, means in the form of the zero detector 44 (FIG. 2) are provided to produce the signal Z whenever the complete counter number N is zero. The signal Z will thus switch at least momentarily to a l level when the number N in the counter 20 is reduced to Zero, and irrespective of Whether this occurs due to the element approaching the zero reference point by movement to the left or right from the positive or negative regions of its path.

Secondly, means are provided to drive the sign flip-op 36 to its set or reset state, respectively, in response to the concurrent existence of (a) the zero signal Z and a discrepancy signal DS of positive polarity, or (b) the zero signal Z and a discrepancy signal DS of negative polarity. As shown in FIGS. 2 and 3, the sign control 38 to serve this function comprises two AND gates Vand 76, respectively, connected to receive the SIG+ and SIG- signals, and both connected to receive the Z signal, as controlling inputs. The gates 75 and 76 have their outputs S+ and R- respectively connected to the set and reset input terminals of the sign flip-flop 36.

Assume that the element 15 is at rest in the positive region of its path so that the signal N+ is at a l level, the signal DS has zero amplitude, and signals SIG+ and SIG- are at 0 levels. If the element moves to the left toward the zero reference point, signal DS will become linite with a negative phase polarity, the SIG- signal will switch to a binary l level, the signal CT will change to a l level, and pulses will be admitted to the counter 20l to make the latter count down, thereby decreasing the number N. If the element 15 continues to move through the zero reference position and into the negative region, then at the instant the number N is reduced to zero and the signal Z switches momentarily to a 1 level, the gate 76 will make its output signal R- a 1, thereby resetting the flip-op 36. The signals N+ and N- thus switch to binary "0 and l levels, and the display unit 41 will thereafter show a symbol.

Conversely, if the element 15 resides initially in the negative region (and the ilip-fiop 36 is reset to make N- a 1) but moves to the right through the zero reference point to the positive region, the counter number N will decrease to zero. At the instant this occurs, the signals Z and SIG+ are simultaneously at the 1 level, and the output signal S+ from the gate 75 will thus switch the flip-ilop 36 to its set state, making the signal N+ a binary 1. When it is once placed in its set or reset state to signal that the counter number N is positive or negative, the flip-llop 36 will remain in that state so long as the element 15 remains in the positive or negative region of its path. Each time the element 15 passes through the zero reference point from the positive to the negative region (or from the negative to the positive region), the ilip-op will be switched to its reset (or set) state, so that the sign of the number N will be signaled as negative (or positive) by virtue of the N- signal (or the N+ signal) residing at a binary 1 level.

DETAILS OF T'HE COUNT DIRECTION CONTROL As pointed out below, the signaled number def represents the indicated position of the movable element, and the sine and cosine voltages Es and Ec derived therefrom establish an analog representation of the indicated position. More particularly, the sine and cosine voltages establish the location of a plurality of null positions, i.e., positions of the element at which the discrepancy signal will have a minimum or substantially zero amplitude. For example, if the signaled number def is (that is, the number N has some value representable as xx.x185 there will be a null or minimum amplitude for the discrepancy signal DS when the element 15 has an actual position numerically representable as xx.xl85. This means that the null response will occur when the element is at any of the actual positions 00.0185", 00.1185", 00.2185", 00.3185", and so on up to 99.9185. For a given value of the number def, the nulls will be spaced 0.1000" apart along the path of travel, but their actual locations on the path will be determined to the nearest .0001 according to the value of the number def. If the counter number N is positive (N+t=1), then as each input pulse is counted in an up or down sense by the counter, the number def will increase or decrease by one, and all of the nulls will shift to the right or left by a distance of .0001". If the number N is negative (N =1), then as each input pulse is counted in an up or down sense by the counter, the number def will increase or decrease by one, and all of the nulls will shift to the left or right through a distance of .0001. As explained above, the present system functions correctively to change the number N in the counter so as to make the signaled number def agree with the last three digits def in a number which corresponds to the actual position of the movable element. If the number def is greater or less than the number def, then the counter must count down or up, respectively, until the two become equal. The signal DS by its phase polarity indicates whether the number def is greater or less than the actual position number def, that is, whether the nearest null corresponding to the number def is located to the left or to the right of the actual position of the element as the latter moves to dilferent positions. But this relationship is different in the positive and negative regions, that is, on opposite sides of the zero reference point, as Will become clear from the position and signal relationships illustrated as exemplary cases by FIG. 5.

If it is assumed that the number def is +009, the sine and cosine function voltages Es and |Ec supplied to the Inductosyn slider 22 will make the discrepancy signal DS have a zero or null amplitude when the element 15 is located at a true position of +1009 with respect to a zero reference point ZRP. But if the element assumes different positions spaced from the +009 location, the discrepancy signal will take on amplitudes and phase polarities as represented by the curve 80 in FIG. 5. Let it be assumed, as a Case I example, that the actual position of the element is at +014 (see the open arrow 81). The discrepancy signal DS corresponding to the point 80a on curve 80 will be of positive phase polarity. To correctvely change the number def so as to locate the null at the actual position of the element 15, pulses will be admitted to the counter 20 and counted in an upward sense. As the counter number def thus increases from +009 to +014, the location of the corresponding null shifts progressively to the right as indicated iby curve portions 82a, 8211, 82C, 82d and 82e. When the null reaches the latter location at +014, the discrepancy signal is reduced to zero and the corrective counting ceases. Thus, Case I as illustrated in FIG. 5, requires that the counter 20 count upwardly whenever the counter number N is positive (i.e., N+==1) and the signaled position def is numerically less than the actual position def so that the phase polarity of the signal DS is positive (i.e., SIG-+:l).

FIG. 5 also illustrates the relationships constituting what may be called Case II. If the counter number def is +009 so that the curve 80 is applicable, but if the actual position number def is less, e.g., +005 as represented by the open arrow 84, then the signal DS will have a negative phase polarity and an amplitude corresponding to the point 8017 on the curve 80. Under these circumstances, the counter must count down in response to corrective pulses. As each pulse is received, the number def will decrease from +009 to +008 to +007, etc., thereby shifting the null location progressively to the left as indicated by curve portions 85a, 85b, 85C and 85d. By the time the signaled number de]c is reduced to +005, the discrepancy signal DS is restored to a -zero amplitude and the corrective counting ceases.

14 Thus, Case II as illustrated in FIG. 5 requires that the counter count down whenever the number N is positive (i.e., N+:=1) and the signaled position def is greater than the actual position def so that the phase polarity of the signal DS is negative (i.e., SIG =1).

Next, let it be assumed that the counter number is negative (i.e., N =1) and that the number def is 011. The discrepancy signal will take on the polarities and amplitudes indicated by the curve 86 (FIG. 5) when the element 15 is located in the region of the null at 011. For Case III, assume that the actual position of the element is at 007 (see open arrow 88), so that the signal DS has a positive phase polarity corresponding to the point 86a on curve 86 (and SIG+ is a l). Under these circumstances, the counter 20 must count down in response to corrective pulses, and as each such pulse is received, the null location will shift one unit to the right as shown by curve portions 89a, 8911, 89C and 89d. When the number def has been reduced in magnitude from 011 to 007, the discrepancy signal becomes zero and corrective counting ceases. From Case III, it may be said that when the number N is negative (N =1) and the phase polarity of the signal DS is positive (SIG+ is a l), then the counter must count down to bring the null location into agreement with the elements actual position.

As Case IV, let it be assumed that the counter number is negative (N-=1) and the number def is 011 so that the curve 86 in FIG. 5 is applicable. Further, let it be assumed that the actual position of the element is in numerical magnitude greater than the number def, e.g., is 016 as represented by the open arrow 90 in FIG. 5. With these relationships, the discrepancy signal DS will have a negative phase polarity and a magnitude corresponding to the point 86h on the curve 86 (and SIG will be a l). Thus, the counter must count up in response to corrective pulses, and as each such pulse is received, the null location Will shift one unit to the left as shown by curve portions 91a, 91b, 91C, 91d and 91e. When the number def has been increased in magnitude from 001 to 016, the corrective counting ceases with the null for the curve 91e corresponding to the actual location of the element, i.e., the open arrow 90. From Case IV it will be seen that when the counter number is negative (N is a 1) and the phase polarity of the signal DS is negative (SIG- is a l), then the counter must count up to bring the null into agreement with the elements actual position.

With the foregoing in mind, the count direction control 35 of the present invention may now be understood. This control comprises means responsive to signals representing the polarities of the number N and the discrepancy. More specilically, it includes means to cause the counter 20 to count up in response to such signals indicating that the signs of the DS signal and the counter number are alike; together with means to cause the counter to count down Whenever the signs of the DS signal and the counter number are unlike. To accomplish this, two AND gates 94, 95 (FIG. 3) are coupled to receive as their paired inputs the SIG+ and N+ signals, and the SIG and N signals, respectively. Whenever the signs of the number N and the discrepancy signal are alike, one or the other of these gates 94, 95 will produce a binary l output which will lbe transferred through an associated OR circuit 96 to make the signal CU reside at a l level. The counter 20 (FIG. 2) will thus count up in response to any pulses received on its input terminal PI.

Further, the count direction control 35 includes two AND gates 97, 98 coupled to receive as their paired inputs the SIG+ yand N- signals, and the SIG- and N+ signals, respectively. When the signs of the discrepancy signal polarity and the number N are alike, one or the other of these AND gates 97 and 98 will produce a binary 1 output signal which will be transferred through 

